TuringCoding & software eval
Senior Digital / High-Speed Hardware Design Engineer
Pay not published
About this role, in Turing's words
Responsible for developing digital and high-speed electronic hardware from requirements definition and component selection through schematic design, PCB layout, and design verification.
What you'll do
Key Responsibilities
- Analyze system requirements and develop hardware specifications and circuit architectures.
- Select processors, microcontrollers, FPGAs, memories, interface ICs, power-management components, and supporting circuitry.
- Design schematics for embedded systems, digital interfaces, communication boards, and high-speed electronic products.
Show all 9 itemsHide the other 6 in Key Responsibilities
- Develop multilayer PCB layouts with appropriate stack-up planning, reference planes, controlled impedance, differential-pair routing, and timing constraints.
- Handle BGA placement and escape routing, power distribution, decoupling, and signal-return-path requirements.
- Apply design practices for interfaces such as USB, Ethernet, DDR, PCIe, LVDS, and MIPI, as relevant to the design.
- Perform schematic reviews, PCB design-rule checks, and design-for-manufacturing assessments.
- Prepare BOMs, manufacturing outputs, and design documentation.
- Support prototype bring-up, debugging, and design validation.
Candidate background
Required Skills
- Strong digital electronics and embedded hardware fundamentals.
- Experience with component selection, schematic capture, and PCB layout using KiCad (mandatory)
- Knowledge of multilayer PCB design, stack-up selection, signal integrity, power integrity, and high-speed routing.
- Ability to interpret component datasheets and interface specifications and translate them into practical hardware designs.
Preferred Experience
- FPGA, DDR memory, high-speed communication interfaces, or complex embedded systems.
- SI/PI analysis, prototype debugging, and hardware validation.
Quoted from selected sections of Turing's posting. The full posting may state other conditions. Read the full posting
A closer look
More context, when you need it.
Full job descriptionThe original posting, in Turing's words
Posted by Turing, reproduced here so you can judge the role before clicking. Original posting ↗
About Turing: Based in San Francisco, California, Turing is the world’s leading research accelerator for frontier AI labs and a trusted partner for global enterprises deploying advanced AI systems.
Role Overview
Responsible for developing digital and high-speed electronic hardware from requirements definition and component selection through schematic design, PCB layout, and design verification.
Experience: 6–12 years
Key Responsibilities
• Analyze system requirements and develop hardware specifications and circuit architectures.
• Select processors, microcontrollers, FPGAs, memories, interface ICs, power-management components, and supporting circuitry.
• Design schematics for embedded systems, digital interfaces, communication boards, and high-speed electronic products.
• Develop multilayer PCB layouts with appropriate stack-up planning, reference planes, controlled impedance, differential-pair routing, and timing constraints.
• Handle BGA placement and escape routing, power distribution, decoupling, and signal-return-path requirements.
• Apply design practices for interfaces such as USB, Ethernet, DDR, PCIe, LVDS, and MIPI, as relevant to the design.
• Perform schematic reviews, PCB design-rule checks, and design-for-manufacturing assessments.
• Prepare BOMs, manufacturing outputs, and design documentation.
• Support prototype bring-up, debugging, and design validation.
Required Skills
• Strong digital electronics and embedded hardware fundamentals.
• Experience with component selection, schematic capture, and PCB layout using KiCad (mandatory)
• Knowledge of multilayer PCB design, stack-up selection, signal integrity, power integrity, and high-speed routing.
• Ability to interpret component datasheets and interface specifications and translate them into practical hardware designs.
Preferred Experience
• FPGA, DDR memory, high-speed communication interfaces, or complex embedded systems.
• SI/PI analysis, prototype debugging, and hardware validation.
Project Details:
• Contract Start Date: Expected between 21 october - 25 october
• Engagement: 8 weeks (with potential chances of extension)
• Commitment - 40 hours/week
• Engagement Type: Contract
Working with TuringPay, getting started and work, from Turing's own pages
What the platform publishes in general. These are not extra terms confirmed for this particular role.
- Getting paid
- Paid monthly, around the 5th, straight to your bank account, or inside Deel on projects run through Deel. Its help articles disagree on whether that is the 5th calendar day or business day. help.turing.com/articles/9691407757-project-onboarding, help.turing.com/articles/6582454854-what-if-i-haven-t-rec..., help.turing.com/articles/1226770947-project-offboarding
- Before your first paid task
- A short application, with tests on some roles. Turing's review article says an interview is typically required for all roles. Onboarding covers the terms, ID verification with a driver's license or passport, and tax and payment details. help.turing.com/articles/2020987592-apply-for-jobs-at-turing, help.turing.com/articles/9179629201-how-long-does-the-app..., help.turing.com/articles/9691407757-project-onboarding
- How much work
- Review takes from 48 hours to 6 weeks after you finish applying, and the client makes the final choice. No reply within 6 weeks usually means you were not selected. help.turing.com/articles/9179629201-how-long-does-the-app..., help.turing.com/articles/2020987592-apply-for-jobs-at-turing
- Contract
- Depending on the project, the engagement rests on Turing's Terms of Service and a Service Agreement, on Deel, or on a partner that provides the contract. help.turing.com/articles/6582454854-what-if-i-haven-t-rec...
Read on the pages linked above on 23 Sep 2026. Platforms change these terms, so check the linked page before you rely on one.
How does the pay compare?Across Coding & software eval roles, not this role alone
From our own daily reads of every open listing on the platforms we follow, not from Turing's posting. How we count.
Pay across the field: Coding & software eval
Across 392 roles in this field with a stated hourly rate in US dollars, on 14 platforms, the middle half pays $65 to $120 an hour at the top of the range, and the median is $95.
| Platform | Roles | Top of range, per hour |
|---|---|---|
| Alignerr | 137 | $50 to $400 · median $100 |
| micro1 | 44 | $60 to $350 · median $120 |
| Handshake AI | 43 | $47 to $125 · median $80 |
| Meridial (Invisible) | 34 | $22 to $150 · median $60 |
| Mercor | 33 | $60 to $200 · median $105 |
Sources and listing historyWhere this information comes from
This listing's history
- First seen here on 13 Oct 2026.
- Posted by Turing
- First seen by AIPayList
- Last seen live
- Listing ID
- 112589
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